Autonomous vehicles and futuristic infotainment systems will need smarter, safer chips, and Arm is making its pitch as to why it should be at the heart of the connected car with a new chipset and safety platform. The company has revealed the new Arm Cortex-A76AE, along with the Arm Safety Ready program, which it promises will help automakers, ADAS developers, and Tier 1 automotive suppliers get their vehicles and components to market faster, but also ensure they’re safe on the road.
It’s not, of course, Arm’s first foray into automotive. The company’s chip designs are already running infotainment systems, advanced driver assistance, and more. Indeed, 65-percent of the silicon already used to run ADAS technology is based on Arm IP.
“Cars are becoming the most complex pieces of electronics that you might own,” Lakshmi Mandyam, VP of Automotive, Embedded & Automotive business at the chip-maker told me ahead of today’s announcement. “From the powertrain to the engine body controllers, the tire pressure monitor and your car seat controller. All of these have been delivered on an Arm-based platform.”
What comes next consists of two elements. On the one hand, there’s a new chip, the Cortex-A76AE. “AE” stands is short for “Automotive Enhanced,” which is Arm’s designator of a chipset designed for in-vehicle processing. It’s built on 7nm processes, and with a strict focus on power consumption.
In fact, Arm is delivering 250+ KDMIPS of performance for around 15W of power. “We believe that’s the right kind of tradeoff point in terms of performance and power,” Mandyam explains, pointing to the trunk-full of compute that current autonomous prototypes are typically forced to lug around.
It will also showcase Arm’s new chip design for safety, Split-Lock. Being used for automotive purposes for the first time, it allows the multiple processor cores that make up the Cortex-A76AE to be locked together for safety through redundancy, or split apart for more processing power.
For example, the Cortex-A76AE has four CPU cores. Split-Lock would lock those into two pairs, and each would run the same instructions. “We have software test libraries that can detect if there’s an error in one of the cores,” Mandyam says. “You can zoom in to where the error has occurred faster.”
Typically, redundant systems in autonomous or heavily-assisted vehicles rely on multiple chipsets. An separate “CPU checker watchdog SoC” is used to compare the results from two cores, and flag if there’s a problem. The issue with that, Arm says, is software complexity, latency, and a bulkier overall design.
Arm’s Split-Lock, in contrast, will allow both split clusters and locked clusters on the same SoC. There’ll also be support for having a “Safety Island” – typically a lower-power Cortex-R – on the same SoC, too. It’ll be faster and more precise at pinpointing where the problem is, and allow the car to “execute a graceful exit,” Mandyam explains, such as automatically pulling to the side of the road, or warning the driver that they need to take over again.
It’s a component of what Arm is calling Arm Safety Ready: safety IP, new safety features, certified software components and new safety tools, and systematic certification to standards like ISO26262. “It accelerates our partners ability to launch safer products, faster,” Mandyam says, though by exactly how much will be a case-by-case matter. Still, Arm’s partners are predicting it will “significantly reduce” how long it takes for their products to get certified.
Usefully, Arm’s architecture allows users of the chips to change how those resources are assigned later on, including with an OTA update. For example, if an autonomous car’s system needed more secure processing power, the SoC could be reassigned to adjust the split further toward ASIL-D, the most stringent security level, rather than ASIL-B, a more permissive level.
Even with all this compute, and all this safety, Arm still takes a more conservative view of the arrival of driverless vehicles than many. “When we look at the journey to autonomy, we believe it will evolve from ADAS and we believe it will take longer than what the industry has been talking about,” Mandyam predicts. “It’s taken us eighteen years to get to Level 3 … and so we see that Level 4 will be limited to early performance in 2024, and then Level 5 in 2027 will be limited to early performance.”
By then, there’ll be a full portfolio of “AE” spec chipsets, including Helios-AE, Hercules-AE, and a future Cortex-R for automotive purposes. As for the Cortex-A76AE, that’s expected to show up in vehicles from 2020.