AMD Releases SSE5, Makes X86 Faster

Aug 30, 2007
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AMD Releases SSE5, Makes X86 Faster

So the processors using this new instruction set aren’t due to be released until 2009, but AMD wants to give people time to make compilers utilizing this instruction set and give programmers time to get used to/start implementing the changes.

So what changes for the programmers? First of all, instead of having to empty at least one of the two registers storing the two numbers to be operated on, before they can store the answer, they will now just be able to store it in a third, so less juggling.

This next part appears important, but I don’t know near enough about this level of detail of processors, so one of the 47 new instructions is called multiply-add-accumulate and allows developers to run multiple instances of the same operation without a separate adding action needed. That one is said to aid in 3D audio effects, and rendering graphics.

The SSE instruction sets started being released by Intel in ’99 with the most recent, until today, being released by Intel this past April. This time instead of just following suit and implementing whatever Intel put out, AMD has taken the initiative to make their own, which will be implemented in 2009 on their Bulldozer-core based chips.

AMD Details Speedier X86 Instructions [via Yahoo News]


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