Intel Xeon Phi: a Teraflop supercomputer in a PCIe card

Jun 18, 2012

Intel has launched its new brand for "Many Integrated Core Architecture" chips, Intel Xeon Phi, with the coprocessors headed to workstations, data centers and even supercomputers. The MIC chips, which are expected to go on sale by the end of the year and were developed under the "Knights Corner" codename, will build on Intel's existing Xeon E5-2600/4600 chip range but be designed to support highly-parallel processing.

Xeon Phi uses the same  22nm, 3-D tri-gate transistors as Ivy Bridge, and comes as a PCIe card with more than 50 cores and at least 8GB of GDDR5 memory. It has 512b wide SIMD support - allowing for multiple elements to be worked on in a single instruction - and Intel claims it's good for more than 1 TeraFLOPs per node.

As well as working with x86 programming models, the Xeon Phi coprocessor will also show up as "an HPC-optimized, highly-parallel, separate compute node that runs its own Linux-based operating system independent of the host OS." Intel says that in doing so it wil support more flexible cluster-solution, such as those that might be incompatible with existing GPU-accelerated systems.

Xeon Phi will first show up in Stampede, a 10 Petaflop HPC Linux cluster expected to be operational by the start of 2013. Stampede, a project by the Texas Advanced Computing Center (TACC) with the University of Texas at Austin, will pair Xeon E5 CPUs - contributing around two Teraflops - with the remaining eight Teraflops delivered by Xeon Phi coprocessors.

Intel says 44 companies have already signed up to use Xeon Phi, including Bull, Cray, Dell, HP, IBM, Inspur, SGI and NEC. It has already promised to hit Exascale performance by 2018.

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